The REAPER Lab congratulates Mr. Arunesh Mishra for successfully defending his M.S. thesis entitled, “BOSELOOP: A Design and Validation Platform for Hardware-in-the-Loop Test Systems.” Mr. Mishra’s research addressed the challenges associated with planning, validating, and documenting complex hardware test systems. He developed a graph-based engineering platform that enables users to visually construct hardware setups, define ports and signal connections, perform automated design checks, and generate documentation such as channel-mapping sheets, and bills of materials. His work demonstrates how software-assisted design and validation can reduce manual engineering effort, improve documentation consistency, and identify integration issues before physical test systems are assembled.
Mr. Mishra earned his B.S. in Computer Engineering from the University of Cincinnati in 2023 and completed his M.S. in Computer Engineering at Texas A&M University in 2026. His professional experience includes hardware validation and embedded engineering work at Tesla, John Deere, and Volvo Trucks. He is continuing his work in hardware validation for broader use by engineering teams. Mr. Mishra was co-advised by Dr. Duncan M. “Hank” Walker (Computer Engineering) and Dr. Robert S. Balog (Electrical Engineering).
